1. Field of the Invention
The invention relates to a negative reference voltage generating circuit. The negative reference voltage generating circuit is used in a NOR flash memory, for example, and generates a negative reference voltage.
2. Description of Related Art
FIGS. 7A and 7B are vertical cross-sectional views illustrating a NOR flash memory cell of Conventional Example 1, and are views illustrating a voltage relation required when a Fowler Nordheim programming/erasing operation is performed with a maximum voltage at 18V or 10V. FIGS. 7A and 7B include a semiconductor substrate 100, a control gate 101, a source 102, a drain 103, and a floating gate 104.
For example, a NOR flash memory features random accessing and requires a high-speed performance. As shown in FIGS. 7A and 7B, to perform the programming/erasing operation, a positive middle voltage 10V, for example, and a negative middle voltage −8V, for example, are used to replace a positive high voltage. By using the middle positive voltage and the negative middle voltage, a MOS transistor in a peripheral circuit has a performance exceeding a high voltage transistor. Since, in this configuration, a thin gate oxidation film and a gate with a short length may be used.
To generate a positive voltage, a bandgap reference voltage generating circuit, such as a peripheral circuit for a NAND flash memory, is commonly used.